1. Field of the Invention
The present invention relates to a mobile wireless set such as an automobile telephone set, a portable telephone set, or a portable telephone set mounted in an automobile, used in an automobile telephone system and so forth.
2. Description of the Prior Art
FIG. 1 is a block diagram showing a conventional mobile wireless set. In the figure, reference numeral 1 represents a receiving unit for demodulating a receiving signal into a sound signal or a control signal and for outputting it. Reference numeral 2 is a frequency synthesizer including a phase locked loop (herein after referred to as PLL) for supplying a signal having a frequency generated by the PLL to the receiving unit 1. Reference numeral 3 is a control unit for executing a control process in response to the control signal outputted from the receiving unit 1 so as to inform the synthesizer 2 of the frequency to be generated by providing a dividing ratio.
FIG. 2 is a block diagram showing the construction of the frequency synthesizer 2. In the figure, a reference numeral 11 is a phase detector for comparing the outputs of a programmable divider 16 and a reference divider 17. Reference numeral 12 is a charge pump for outputting a signal having an amplitude proportional to the phase difference between the outputs detected by the phase detector 11. Reference numeral 13 is a loop filter for removing the high frequency components from the output of the charge pump 12, and 14 is a voltage-controlled oscillator. Reference numeral 15 is a prescaler for dividing the output frequency of the voltage-controlled oscillator 14, and 16 is a programmable divider for further dividing the output of the prescaler 15 by the specified dividing ratio given by the control unit 3. Reference numeral 17 is the afore-mentioned reference divider for generating a signal having the reference frequency by dividing a reference signal to send the signal having the reference frequency to the phase detector 11.
Next, the operation of the frequency synthesizer 2 will be described. The reference divider 17 divides the reference signal, which is outputted from, for example, a crystal oscillator 18, by the dividing ratio given by the control unit 3, to generate the signal having the reference frequency. The signal having the reference frequency is inputted into the phase detector 11. On the other hand, the programmable divider 16 divides the output signal of the proscaler 15 by the dividing ratio specified by the control unit 3, and outputs the divided signal to the phase detector 11. The signal outputted from the reference divider 17 and the signal outputted from the programmable divider 16 are compared in phase by the phase detector 11. The charge pump 12 outputs the signal proportional to the phase difference between the signals detected by the phase detector 11. The output signal of the charge pump 12 is inputted into the loop filter 13 in which the high frequency components are removed from the signal inputted into the charge pump 12. Then the signal without the high frequency components is inputted into the voltage-controlled oscillator 14. The voltage-controlled oscillator 14 oscillates with a frequency proportional to the output voltage of the loop filter 13. The output signal of the voltage-controlled oscillator 14 is sent as a local oscillating signal to the receiving unit 1 (FIG. 1), and also is inputted into the prescaler 15. The prescaler 15 divides the frequency of the output signal from the voltage-controlled oscillator 14 and outputs the divided signal to the programmable divider 16. Thus, by synchronizing the output signal of the reference divider 17 and the output signal of the programmable divider 16 to have a predetermined phase difference therebetween, the output signal of the voltage-controlled oscillator 14 is stabilized with a predetermined frequency determined by the dividing ratio specified by the control unit 3.
In the mobile wireless set employing the frequency synthesizer 2 as described above, when the mobile wireless set is in a waiting state for waiting an arriving call to the mobile wireless set under consideration, the frequency synthesizer 2 operates even when unnecessary data is transmitted, so that the power consumption is increased. To avoid this, an attempt has been made to decrease the power consumption by intermittently operating the frequency synthesizer during the waiting state.
FIG. 3 is a block diagram showing an example of a conventional frequency synthesizer which is operated intermittently and which is included in a mobile wireless set disclosed in, for example, Japanese Patent Publication (Kokai) No. 60-190032. In the figure, reference numeral 20 is a PLL circuit including a prescaler, a programmable divider, a reference divider, a phase detector, and so forth. The PLL circuit 20, the loop filter 13, and the voltage-controlled oscillator 14 constitute a frequency synthesizer. Reference numeral 21 is a switch provided between the PLL circuit 20 and the loop filter 13, for cutting the loop in the circuit of the frequency synthesizer. Reference numeral 22 is a charge and discharge circuit for intermittently charge or discharge capacitors in the loop filter 13 when the loop is cut. Reference numeral 23 is a switch for controlling the connection between the charge and discharge circuit 22 and the loop filter 13. Reference numeral 24 is an inverter for complementary opening and closing the switch 21 and the switch 23, based on a loop cutting signal intermittently generated by a control unit.
Next, the operation of the circuit shown in FIG. 3 will be described. In a normal operating state in which the loop cutting signal is not given by the control unit 3, the switch 21 is closed and the switch 23 is opened. Accordingly, the frequency synthesizer operates in the similar way as in the case described with reference to FIG. 2 so that the voltage-controlled oscillator 14 stably oscillates to output a signal having the specified predetermined frequency. On the other hand, when the loop cutting signal is inputted, the switch 2S is turned ON so that the charge and discharge circuit 22 is connected to the loop filter 13. In addition, the loop cutting signal is sent through the inverter 24 to the switch 21 to turn it to the OFF state. Simultaneous with this, the power supply to the PLL circuit 20 is cut. By this operation, the consuming power in the frequency synthesizer is decreased to almost only the power consumed in the voltage-controlled oscillator 14.
Since the mobile wireless set shown in FIG. 3 is constructed as above, to keep the frequency of the output signal of the frequency synthesizer during a period when the power supply for the PLL circuit 20 is cut, it is necessary to provide the charge and discharge circuit 22 for charging and discharging charges in the capacitors of the loop filter 13. Because of the presence of the charge and discharge circuit 22, the mobile wireless set becomes complicated and expensive.
In addition, there is another problem in that the control of the time constant of the charge and discharge in the charge and discharge circuit 22 is complex as described below. Namely, it is assumed that the charge and discharge circuit 22 does not operate during the period when the loop cutting signal is ON. In this condition, in case there is no leakage current in the switches 21 and 23, the charges stored in the capacitors in the loop filter 13 are discharged depending on the lapse of time so that the frequency of the output signal of the voltage-controlled oscillator 14 is gradually lowered. The fluctuation of the frequency depends on the control voltage which is the output voltage of the loop filter 13 and inputted to the voltage-controlled oscillator 14. Namely, when the control voltage is low, the amount of discharge of the charges stored in the capacitors in the loop filter 13 is small so that the fluctuation of the frequency is small; and when the control voltage is high, the amount of discharge of the charges stored in the capacitors in the loop filter 13 is large so that the fluctuation of the frequency is large. On the other hand, in case there is a leakage current in the switches 21 or 23, and if the leakage current is larger than the discharge current from the loop filter 13, the capacitors in the loop filter 13 are gradually charged so that the frequency is conversely increased. In this case, the higher the control voltage, the smaller the change in the frequency.
The fluctuation of the frequency of the output signal of the frequency synthesizer of this type is compensated by charging or discharging the capacitors in the loop filter 13 by the charge and discharge circuit 22 connected to the loop filter 13 by closing the switch 23. As mentioned above, however, in both cases where there is a leakage current and where there is no leakage current in the switches 21 and 23, the fluctuation of the frequency largely depends on the control voltage (or a holding voltage) inputted to the voltage-controlled oscillator 14. Accordingly, to charge or discharge the capacitors in the loop filter 13 by means of the charge and discharge circuit 22, it is necessary to finely control the amount of charges to be charged or discharged, corresponding to the control voltage inputted to the voltage-controlled oscillator 14, so that the control becomes complex.
FIG. 4 is a block diagram showing another example of a conventional frequency synthesizer which is operated intermittently and which is included in a mobile wireless set disclosed in, for example, Japanese Patent Publication (Kokai) No. 2-261226. In the figure, reference numeral 4 is a control unit which is different from the control unit 3 shown in FIG. 1 in that the control unit 4 generates an intermittent signal based on the control signal demodulated by the receiving unit 1, during a waiting state to wait an arriving call to the mobile wireless set under consideration. Reference numeral 5 is a power supply unit for supplying a necessary power to the control unit 4, the receiving unit 1, and the frequency synthesizer 2. Reference numeral 6 is a power switch for turning ON or OFF of the power to be supplied from the power supply unit 5 to the receiving unit 1 or to the frequency synthesizer 2.
Next, the operation of the circuit shown in FIG. 4 will be described. When an input electric field detecting circuit in the receiving unit 1 detects an input electric field having a level higher than a predetermined level, the mobile wireless set under consideration enters into a waiting state for waiting an arriving call to the mobile wireless set so that the control unit 4 turns ON the power switch 6. Thereby, the receiving unit 1 and the frequency synthesizer 2 start to operate so that the frequency synthesizer 2 sends the signal having the frequency determined by the dividing ratio specified by the control unit 4 to the receiving unit 1, and the receiving unit 1 sends the control signal, which is demodulated from the receiving signal based on the frequency, to the control unit 4. The control unit 4 generates an intermittent signal which is turned ON when the received control signal is a word necessary for the mobile wireless set under consideration, thereby, the intermittent control of the receiving unit 1 and the frequency synthesizer 2 is started. An example of this conventional intermittent control will be described with reference to FIG. 5A and FIG. 5B.
FIG. 5A is a timing diagram showing the receiving data (control signal) received by the control unit 4 during a waiting state, and FIG. 5B is a timing diagram showing the intermittent signal generated by the control unit 4, in the 800 MHz mobile wireless telephone system "EIA IS-19" in U.S.A., as an example. As can be seen from FIG. 5A, under the regulation of the system "EIA IS-19", one frame of the control signal sent from the receiving unit 1 to the control unit 4 consists of a pattern of DT (Dotting) and WS (Word Sync.) indicating the head of the frame, and subsequent alternating signals A1, B1, A2, B2, A3, B3, . . . of the A words (A1 to A5) and B words (B1 to B5). The A words are control signals for a mobile wireless set having, for example, an even telephone number, and the B words are control signals for a mobile wireless set having, for example, an odd telephone number. in the A words and in the B words, calling signals for calling respective mobile wireless sets are included. Therefore, the mobile wireless set to which the A words are allocated receives the words A1 to A5 to carry out a 3/5 decision by majority for each bit in the five words. In this case, the words B1 to B5 of the B words are not necessary for the mobile wireless set under consideration.
In the prior art disclosed in the Japanese Patent Publication (Kokai) No. 2-261226, in view of the fact that the B words are not necessary for a mobile wireless set to which the A words are allocated, the power is supplied to the receiving unit 1 and the frequency synthesizer 2 only during the periods when the words A1 to A5 are received, and the power supply is stopped during the periods when the words B1 to B5 are received, thereby the reduction of the power consumption is realized. To this end, when the control unit 4 detects the dotting signal DT and the word synchronization signal WS included in the control signal shown in FIG. 5A, the control unit 4 generates an intermittent signal as shown in FIG. 5B and sends it to the power switch 6. In FIG. 5B, the intermittent signal is ON only when the A words are received. The switching operation of the power switch 6 is controlled by the intermittent signal so that the power from the power source 5 is not supplied to the receiving unit 1 and the frequency synthesizer 2 during the periods when the intermittent signal is OFF. Note that lines 51 and 52 which directly connect The power source 5 with the receiving unit 1 and the frequency synthesizer 2 are lines for directly supplying the power from the power source 5 to the parts, to which the power is always necessary to be supplied, in the receiving unit 1 and the frequency synthesizer 2.
Since the conventional mobile wireless set shown in FIG. 4 is constructed as described above, there is a problem described as follows. Namely, the power is supplied to the frequency synthesizer 2 and so forth only during the periods when the allocated words are received, so that the power supply for the frequency synthesizer 2 must be turned ON or OFF at each time one word is received in such a way that the power supply for the frequency synthesizer 2 is turned ON during the period when the word A1 is received, and the power supply for the frequency synthesizer 2 is turned OFF during the period when the word B1 is received. Because of this, during one frame period, the power supply for the frequency synthesizer 2 must be turned ON several times equal to the number of the necessary words in one frame, so that there is a problem in that the power consumption is still large.
In addition, in the frequency synthesizer 2 shown in FIG. 2, the reference divider 17 and the programmable divider 16 have a plurality of flip flops so that the phase difference between the output signals of the reference divider 17 and the programmable divider 16 is indefinite immediately after the power is turned ON again. Therefore, a large error signal is outputted from the phase detector 11 so that a long time is necessary to stabilize the frequency of the output signal of the voltage-controlled oscillator 13 after a temporal jump of the frequency. Therefore, in accordance with the intermittent signal shown in FIG. 5B in which the frequency synthesizer 2 is be turned ON several times equal to the number of the necessary words in one frame, after turning OFF the frequency synthesizer 2 in response to an end of the reception of one necessary word (for example, A1), the frequency synthesizer 2 is turned ON again in response to the reception of the next necessary word (for example, A2) before the output of the frequency synthesizer 2 is stabilized. Since this operation is repeated during one frame of the signal is received, the error in the frequency of the output signal of the frequency synthesizer 2 is increased. Therefore, actually, there is a problem in that it is difficult to turn ON or OFF of the frequency synthesizer 2 within a time period of 4.4 ms which is allocated to one word.